Dual N-Channel MOSFET - ON Semiconductor
Description
FDMS3669S PowerTrench® Power Stage
FDMS3669S
PowerTrench® Power Stage
General Description
Asymmetric Dual N-Channel MOSFET Features
Q1: N-Channel Max rDS(on) = 10 mΩ at VGS = 10 V, ID = 13 A Max rDS(on) = 14.
5 mΩ at VGS = 4.
5 V, ID = 10 A
Q2: N-Channel Max rDS(on) = 5 mΩ at VGS = 10 V, ID = 18 A Max rDS(on) = 5.
2 mΩ at VGS = 4.
5 V, ID = 17 A Low inductance packaging shortens rise/fall times, resulting in lower switching losses
MOSFET integration enables optimum layout for lower circuit inductance and reduced switch node ringing
This device includes two specialized N-Channel MOSFETs in a dual PQFN package.
The switch node has been internally connected to enable easy placement and routing of synchronous buck converters.
The control MOSFET (Q1) and synchronous SyncFETTM (Q2) have been designed to provide optimal power efficiency.
Applications
Computing Communications General Purpose Point of Load Notebook VCORE
RoHS Compliant
Pin 1
G1
D1
Pin
D1
1
D1 D1
S2 5
Q2
4 D1
PHAS
E(S1/
G2
D2)
S2 S2 S2
Top
Power 56
Bottom
S2 6 S2 7
PHAS E
3 D1 2 D1
G2 8
Q1
1 G1
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol VDS VGS
ID
EAS PD TJ, TSTG
Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Package limited)
-Continuous (Silicon limited) -Continuous -Pulsed Single Pulse Avalanche Energy Power Dissipation for Single Operation Power Dissipation for Single Operation Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 3) TC = 25 °C TC = 25 °C TA = 25 °C
(Note 6)
TA = 25 °C TA = 25 °C
Q1
Q2
30
30
±20
±12
24
60
43 131a
75 181b
50 614 2.
21a 1.
01c
60 485 2.
51b 1.
01d
-55 to +150
Units V V
A
mJ W °C
RθJA RθJA RθJC
Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case
Package Marking and Ordering Information
571a 1251c
5.
0
501b 1201d
2.
8
°C/W
Device Marking 9ACF 21CD
Device FDMS3669S...
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