MC74HC4351
Analog Multiplexers/ Demultiplexers with Address Latch
High−Performance Silicon−Gate CMOS
The MC54/74HC4351, and MC54/74HC4353 utilize silicon−gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. These analog multiplexers/demultiplexers control analog voltages that may vary across the complete power supply range (from VCC to VEE).
The Channel−Select inputs determine which one of the Analog Inputs/Outputs is to be connected, by means of an analog switch, to the Common Output/Input. The data at the Channel−Select inputs may be latched by using the active−low Latch Enable pin. When Latch Enable is high, the latch is transparent. When either Enable 1 (active low) or Enable 2 (active high) is inactive, all analog switches are turned off.
The Channel−Select and Enable inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
These devices have been designed so that the ON resistance (Ron) is more linear over input voltage than Ron of metal−gate CMOS analog switches.
For multiplexers/demultiplexers without latches, see the HC4051, HC4052, and HC4053.
• Fast Switching and Propagation Speeds • Low Crosstalk Between Switches • Diode Protection on All Inputs/Outputs • Analog Power Supply Range (VCC − VEE) = 2. 0 to 12. 0 V • Digital (Control) Power Supply Range (VCC − GND) = 2. 0 to 6. 0 V • Improved Linearity and Lower ON Resistance than Metal−Gate
Types
• Low Noise • In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: HC4351 — 222 FETs or 55. 5 Equivalent Gates
HC4353 — 186 FETs or 46. 5 Equivalent Gates
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20 1
J SUFFIX CERAMIC PACKAGE
CASE 732−03
20 1
20 1
N SUFFIX PLASTIC PACKAGE
CASE 738−03
DW SUFFIX SOIC PACKAGE CASE 751D−04
ORDERING INFORMATION
MC54HCXXXXJ MC74HCXXXXN MC74HCXXXXDW
Ceramic Plastic SOIC
PIN ASSIGNMENT MC54/74HC4351
X4 1 X6 2
20 VCC 19 X2
NC 3
18 X1
X4
17 X0
X7 5
16 X3
X5 6
...