N-Channel FET - ON Semiconductor
Description
NDP6060L / NDB6060L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features 48A, 60V.
RDS(ON) = 0.
025Ω @ VGS = 5V.
These logic level N-Channel enhancement mode power field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology.
This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Low drive requirements allowing operation directly from logic drivers.
VGS(TH) < 2.
0V.
Critical DC electrical parameters specified at elevated temperature.
Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through hole and surface mount applications.
________________________________________________________________________________
D
G S
Absolute Maximum Ratings
Symbol Parameter
TC = 25°C unless otherwise noted NDP6060L
VDSS
Drain-Source Voltage
VDGR
Drain-Gate Voltage (RGS < 1 MΩ)
VGSS
Gate-Source Voltage - Continuous
- Nonrepetitive (tP < 50 µs)
ID
Drain Current - Continuous
- Pulsed
PD
Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG TL
Operating and Storage Temperature
Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
60 60 ± 16 ± 25 48 144 100 0.
67 -65 to 175 275
NDB6060L
Units V V V
A
W W/°C
°C °C
© 1997 Semiconductor Components Industries, LLC.
September-2017, Rev.
5
Publication Order Number: NDP6060L/D
Electrical Characteristics (TC = 25°C unles...
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