CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574
Data sheet acquired from Harris Semiconductor SCHS183C
February 1998 - Revised May 2004
High-Speed CMOS Logic Octal D-Type Flip-Flop, 3-State Positive-Edge Triggered
[ /Title (CD74 HC374 , CD74 HCT37 4, CD74 HC574 , CD74 HCT57
Features
Description
• Buffered Inputs
• Common Three-State Output Enable Control
• Three-State Outputs
• Bus Line Driving Capability
• Typical Propagation Delay (Clock to Q) = 15ns at VCC = 5V, CL = 15pF, TA = 25oC
• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types - 2-V to 6-V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types - 4. 5-V to 5. 5-V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0. 8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
The ’HC374, ’HCT374, ’HC574, and ’HCT574 are octal D-type flip-flops with 3-state outputs and the capability to drive 15 LSTTL loads. The eight edge-triggered flip-flops enter data into their registers on the LOW to HIGH transition of clock (CP). The output enable (OE) controls the 3-state outputs and is independent of the register operation. When OE is HIGH, the outputs are in the high-impedance state. The 374 and 574 are identical in function and differ only in their pinout arrangements.
Ordering Information
PART NUMBER
TEMP. RANGE (oC)
PACKAGE
CD54HC374F3A
-55 to 125
20 Ld CERDIP
CD54HC574F3A
-55 to 125
20 Ld CERDIP
CD54HCT374F3A
-55 to 125
20 Ld CERDIP
CD54HCT574F3A
-55 to 125
20 Ld CERDIP
CD74HC374E
-55 to 125
20 Ld PDIP
CD74HC374M
-55 to 125
20 Ld SOIC
CD74HC374M96
-55 to 125
20 Ld SOIC
CD74HC574E
-55 to 125
20 Ld PDIP
CD74HC574M
-55 to 125
20 Ld SOIC
CD74HC574...
74HCT574 PDF File
