74SSTUB32868
www. ti. com . . . SCAS835C – JUNE 2007 – REVISED MARCH 2009
28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST
FEATURES
1
•2 Member of the Texas Instruments Widebus+ ™Family
• Pinout Optimizes DDR2 DIMM PCB Layout • 1-to-2 Outputs Supports Stacked DDR2 DIMMs • One Device Per DIMM Required • Chip-Select Inputs Gate the Data Outputs from
Changing State and Minimizes System Power Consumption
• Output Edge-Control Circuitry Minimizes Switching Noise in an Unterminated Line
• Supports SSTL_18 Data Inputs • Differential Clock (CL...
74SSTUB32868 PDF File
