OCTAL BUS TRANSCEIVERS-REGISTERS - Texas Instruments
Description
D Operating Voltage Range of 4.
5 V to 5.
5 V D Low Power Consumption, 80-µA Max ICC D Typical tpd = 12 ns D ±6-mA Output Drive at 5 V D Low Input Current of 1 µA Max D Inputs Are TTL-Voltage Compatible
SN54HCT646 .
.
.
JT OR W PACKAGE SN74HCT646 .
.
.
DW OR NT PACKAGE
(TOP VIEW)
SN54HCT646, SN74HCT646 OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS178C – MARCH 1984 – REVISED MARCH 2003
D Independent Registers for A and B Buses D Multiplexed Real-Time and Stored Data D True Data Paths D High-Current 3-State Outputs Can Drive Up
To 15 LSTTL Loads
SN54HCT646 .
.
.
FK PACKAGE (TOP VIEW)
DIR SAB CLKAB NC VCC CLKBA SBA
CLKAB 1 SAB 2 DIR 3 A1 4 A2 5 A3 6 A4 7 A5 8 A6 9 A7 10 A8 11 GND 12
24 VCC 23 CLKBA 22 SBA 21 OE 20 B1 19 B2 18 B3 17 B4 16 B5 15 B6 14 B7 13 B8
4 3 2 1 28 27 26
A1 5
25 OE
A2 6
24 B1
A3 7
23 B2
NC 8
22 NC
A4 9
21 B3
A5 10
20 B4
A6 1112 13 14 15 16 17 1819 B5
A7 A8 GND NC B8 B7 B6
description/ordering information
NC – No internal connection
The ’HCT646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.
Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input.
Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’HCT646 devices.
Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions.
In the transceiver mode, data present at the high-impedance port can be stored in either or both registers.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE PART NUMBER
TOP-SIDE MARKING
PDIP – NT
Tube
SN74HCT646NT
SN74HCT646NT
–40°C to 85°C
SOIC – DW
Tube Tape and reel
SN74HCT646DW SN74HCT646DWR
HCT646
CDIP – JT
Tube
SNJ54HCT646JT
SNJ54HCT646JT
–55°C to 125°C CFP – W
Tube
SNJ54HCT646W
SNJ54HCT646W
LCCC – FK
Tube
SNJ...
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