CLOCK MULTIPLIER - Renesas
Description
LOCO™ PLL CLOCK MULTIPLIER
DATASHEET
ICS502
Description
The ICS502 LOCOTM is the most cost effective way to generate a high-quality, high-frequency clock output and a reference from a lower frequency crystal or clock input.
The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems.
Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz.
Stored in the chip’s ROM is the ability to generate six different multiplication factors, allowing one chip to output many common frequencies (see table on page 2).
This product is intended for clock generation.
It has low output jitter (variation in the output period), but input to output skew and jitter are not defined or guaranteed.
For applications which require defined input to output skew, use the ICS570B.
Features
• Packaged as 8-pin SOIC or die • Pb (lead) free package • IDT’s lowest cost PLL clock • Zero ppm multiplication error • Easy to cascade with ICS5xx series • Input crystal frequency of 5 – 27 MHz • Input clock frequency of 2 – 50 MHz • Output clock frequencies up to 190 MHz • Low jitter – 50 ps one sigma • Compatible with all popular CPUs • Duty cycle of 45/55 up to 160 MHz • Operating voltages of 3.
0 to 5.
5 V • 25 mA drive capability at TTL levels • Industrial temperature version available • Advanced, low-power CMOS process
Block Diagram
VDD
S1, S0
X1/ICLK Crystal or Clock input
X2
2
Crystal OScillator
PLL Clock M u ltip lie r Circuitry and
ROM
GND
CLK REF
IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER
1
ICS502
REV M 051310
ICS502 LOCO™ PLL CLOCK MULTIPLIER
Pin Assignment
X1/ICLK 1 VDD 2 GND 3 REF 4
8 X2 7 S1 6 S0 5 CLK
8 Pi n (150 mi l ) SOI C
CLOCK MULTIPLIER
Clock Decoding Table (MHz)
S1 S0 00 01 M0 M1 10 11
CLK x2 x5 x3 x3.
33 x4 x2.
5
Minimum input frequency for all selections is per table on page 3.
0 = connect directly to ground 1 = connect dire...
Similar Datasheet
