N-Channel Enhancement Mode Power MOSFET - CYStech
Description
CYStech Electronics Corp.
Spec.
No.
: C886N3 Issued Date : 2012.
11.
14 Revised Date : 2018.
06.
20 Page No.
: 1/10
100V N-Channel Logic Level Enhancement Mode MOSFET
MTBC7N10N3
BVDSS
100V
ID @TA=25°C, VGS=10V
1A
RDSON(TYP)@VGS=10V, ID=1A 389mΩ
RDSON(TYP)@VGS=4.
5V, ID=1A 413mΩ
RDSON(TYP)@VGS=4V, ID=1A 407mΩ
Features
• Lower gate charge.
• ESD protected gate.
• Pb-free lead plating and Halogen-free package.
Equivalent Circuit
MTBC7N10N3 D
Outline
SOT-23 D
G
S G：Gate S：Source D：Drain
S G
Ordering Information
Device MTBC7N10N3-0-T1-G
Package
SOT-23 (Pb-free lead plating and halogen-free package)
Shipping 3000 pcs / tape & reel
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products
Packing spec, T1 : 3000 pcs / tape & reel, 7” reel
Product rank, zero for no rank products
Product name
MTBC7N10N3
CYStek Product Specification
CYStech Electronics Corp.
Spec.
No.
: C886N3 Issued Date : 2012.
11.
14 Revised Date : 2018.
06.
20 Page No.
: 2/10
Absolute Maximum Ratings (Tc=25C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage Continuous Drain Current Pulsed Drain Current
TA=25°C, VGS=10V TA=70°C, VGS=10V
Power Dissipation
Operating Junction and Storage Temperature
Symbol VDS VGS ID IDM
PD Tj, Tstg
Limits
100 ±20
1 0.
8 4 (Note 1 & 2) 1 (Note 3) 0.
54 (Note 4) -55 ~ +150
Unit V
A
W C
Thermal Data
Parameter
Symbol
Value
Unit
Thermal Resistance, Junction-to-ambient, max Thermal Resistance, Junction-to-ambient, max
Rth,j-a Rth,j-a
125 (Note 3) 231 (Note 4)
C/W
Note :1.
Pulse width limited by maximum junction temperature.
2.
Duty cycle ≤ 1%.
3.
Surface mounted on a ceramic board (30×30×0.
8mm), t≤10s.
4.
Surface mounted on a FR-4 board (12×20×0.
8mm), t≤10s; 357C/W when mounted on min.
copper pad.
Electrical Characteristics (TA=25C, unless otherwise specified)
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Static BVDSS
△BVDSS/△Tj
100 -
107
- V VGS=0V, ID=25...
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