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Reference Design
LM5025D Active Clamp Voltage Mode PWM Controller
LM5025D
SNVSAB0 – JUNE 2015
1 Features
•1 Internal Start-Up Bias Regulator • 3-A Compound Main Gate Driver • Programmable Line Under-Voltage Lockout
(UVLO) with Adjustable Hysteresis • Voltage Mode Control with Feed-Forward • Adjustable Dual Mode Over-Current Protection • Programmable Overlap or Deadtime Between the
Main and Active Clamp Outputs • Volt x Second Clamp • Programmable Soft-Start • Leading Edge Blanking • Single Resistor Programmable Oscillator • Oscillator Up and Down Sync Capability • Precision 5-V Reference • Thermal Shutdown
2 Applications
• Server Power Supplies • 48-V Telecom Power Supplies • 42-V Automotive Applications • High-Efficiency DC-to-DC Power Supplies
3 Description
The LM5025D is a functional variant of the LM5025 active clamp PWM controller. The functional differences of the LM5025D are:
• The CS1 and CS2 absolute maximum ratings have been increased to 7 V.
• The CS1 and CS2 current limit thresholds have been increased to 0. 5 V.
• The internal CS2 filter discharge device has been disabled and no longer operates each clock cycle.
• The internal VCC and VREF regulators continue to operate when the line UVLO pin is below threshold.
The LM5025D PWM controller contains all of the features necessary to implement power converters utilizing the Active Clamp and Reset technique. With the active clamp technique, higher efficiencies and greater power densities can be realized compared to conventional catch winding or RDC clamp and reset techniques. Two control outputs are provided, the main power switch control (OUT_A) and the active clamp switch control (OUT_B). The two internal compound gate drivers parallel both MOS and Bipolar devices, providing superior gate drive characteristics. This controller is designed for high-speed operation including an oscillator frequency range up to 1 MHz ...
LM5025D PDF File
