DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP - Texas Instruments
Description
74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP
WITH CLEAR AND PRESET
SCAS064A – D3339, JUNE 1989 – REVISED APRIL 1993
• Inputs Are TTL-Voltage Compatible • Fully Buffered to Offer Maximum Isolation
From External Disturbance
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
t• EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process
• 500-mA Typical Latch-Up Immunity at 125°C • Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
D OR N PACKAGE (TOP VIEW)
1PRE 1Q 1Q
GND 2Q 2Q
2PRE 2J
1 2 3 4 5 6 7 8
16 1J 15 1K 14 1CLK 13 1CLR 12 VCC 11 2CLR 10 2CLK 9 2K
description
This device contains two independent J-K negative-edge-triggered flip-flops.
A low level at the PRE or CLR input sets or resets the outputs regardless of the levels of the other inputs.
When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the negative-going edge of the clock pulse.
Clock triggering occurs at a voltage level and is not directly related to the fall time of the clock pulse.
Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs.
These versatile flip-flops can perform as toggle flip-flops by tying J and K high.
The 74ACT11112 is characterized for operation from – 40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUTS
PRE CLR CLK J K Q Q
L H X XXHL
H L X XXLH
{ {L L X X X H H
H H ↓ L L Q0 Q0 H H ↓ HLHL
H H ↓ LHLH
H H ↓ H H TOGGLE
H H H X X Q0 Q0 † This configuration is nonstable; that is, it will not
persist when either PRE or CLR returns to the inactive (high) level.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing...
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