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74HCT175

nexperia
Part Number 74HCT175
Manufacturer nexperia
Description Quad D-type flip-flop
Published Jul 23, 2019
Detailed Description 74HC175; 74HCT175 Quad D-type flip-flop with reset; positive-edge trigger Rev. 6 — 4 February 2021 Product data sheet...
Datasheet PDF File 74HCT175 PDF File

74HCT175
74HCT175


Overview
74HC175; 74HCT175 Quad D-type flip-flop with reset; positive-edge trigger Rev.
6 — 4 February 2021 Product data sheet 1.
General description The 74HC175; 74HCT175 is a quad positive-edge triggered D-type flip-flop with individual data inputs (Dn) and complementary outputs (Qn and Qn).
The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously.
The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.
A LOW on MR causes the flip-flops and outputs to be reset LOW.
Inputs include clamp diodes.
This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2.
Features and benefits • Input levels: • For 74HC175: CMOS level • For 74HCT175: TTL level • Four edge-triggered D-type flip-flops • Asynchronous master reset • Complies with JEDEC standard no.
7A • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Specified from -40 °C to +85 °C and -40 °C to +125 °C.
3.
Ordering information Table 1.
Ordering information Type number Package Temperature range Name 74HC175D -40 °C to +125 °C SO16 74HCT175D 74HC175PW -40 °C to +125 °C TSSOP16 74HCT175PW Description plastic small outline package; 16 leads; body width 3.
9 mm plastic thin shrink small outline package; 16 leads; body width 4.
4 mm Version SOT109-1 SOT403-1 Nexperia 74HC175; 74HCT175 Quad D-type flip-flop with reset; positive-edge trigger 4.
Functional diagram 9 4 CP Q0 D0 Q0 2 3 5 D1 Q1 7 Q1 6 12 D2 Q2 10 11 Q2 13 Q3 D3 MR Q3 15 14 1 aaa-008921 Fig.
1.
Logic symbol D0 D1 9 C1 1R 4 1D 5 12 13 Fig.
2.
IEC logic symbol D2 D3 2 3 7 6 10 11 15 14 aaa-008922 CP MR Fig.
3.
Logic diagram DQ CP FF1 Q RD DQ CP FF2 Q RD DQ CP FF3 Q RD DQ CP FF4 Q RD Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 aaa-008927 74HC_HCT175 Product data sheet All information provided in this document is subject to legal d...


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