Dual 1-TO-1 Differential-to-LVCMOS Translator/Buffer - IDT
Description
Dual, 1-TO-1 Differential-to-LVCMOS Translator/Buffer
83023I
Data Sheet
GENERAL DESCRIPTION
The 83023I is a dual, 1-to-1 Differential-to-LVCMOS Translator/Fanout Buffer.
The differential inputs can accept most differential signal types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and translate into two single-ended LVCMOS outputs.
The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.
Features
• Two LVCMOS / LVTTL outputs • Two differential CLKx, nCLKx input pairs • CLK, nCLK pairs can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 350MHz (typical) • Output skew: 60ps (maximum) • Part-to-part skew: 500ps (maximum) • Additive phase jitter, RMS: 0.
14ps (typical) • Small 8 lead SOIC package saves board space • 3.
3V operating supply • -40°C to 85°C ambient operating temperature
BLOCK DIAGRAM
CLK0 nCLK0
CLK1 nCLK1
Q0 Q1
PIN ASSIGNMENT
CLK0 nCLK0 nCLK1
CLK1
...
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