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ODTSXN16

AMI
Part Number ODTSXN16
Manufacturer AMI
Description CMOS Gate Array
Published Mar 13, 2018
Detailed Description 2'76;1[[ ® $0,+*  PLFURQ &026 *DWH $UUD\ Description ODTSXNxx is a family of 4 to 24 mA, non-inverting, TTL-level...
Datasheet PDF File ODTSXN16 PDF File

ODTSXN16
ODTSXN16

Overview
2'76;1[[ ® $0,+*  PLFURQ &026 *DWH $UUD\ Description ODTSXNxx is a family of 4 to 24 mA, non-inverting, TTL-level, output buffer pieces with N-channel open-drains (pulldown) and controlled slew rate outputs.
Logic Symbol Truth Table ODTSXNxx A PADM A PADM LL HZ Z = High Impedance Pad Logic HDL Syntax Verilog ODTSXNxx inst_name (PADM, A); VHDL.
.
inst_name: ODTSXNxx port map (PADM, A); Pin Loading Pin Name A (eq-load) PADM (pF) ODTSXN04 8.
1 4.
90 ODTSXN08 8.
1 4.
90 Load ODTSXN12 8.
1 4.
90 ODTSXN16 8.
1 4.
90 ODTSXN24 8.
1 4.
90 Power Characteristics Cell Output Drive (mA) ODTSXN04 4 ODTSXN08 8 ODTSXN12 12 ODTSXN16 16 ODTSXN24 24 ...


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