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ANE2

Part Number	ANE2
Manufacturer	AMI
Description	CMOS Gate Array
Published	Mar 12, 2018
Detailed Description	Core Logic $1([ $0,+* PLFURQ &026 *DWH $UUD\ Description ANEx is a family of AND-NOR circuits consisting of thre...
Datasheet	ANE2 PDF File

Overview

Core Logic $1([ $0,+* PLFURQ &026 *DWH $UUD\ Description ANEx is a family of AND-NOR circuits consisting of three 3-input AND gates into a 3-input NOR gate.
Logic Symbol Truth Table A ANEx B ABCDE FGH I Q C D HHHXXXXXX L E F Q XXXHHHXXX L G XXXXXXHHH L H I All other combinations H HDL Syntax Verilog ANEx inst_name (Q, A, B, C, D, E, F, G, H, I); VHDL.
.
inst_name: ANEx port map (Q, A, B, C, D, E, F, G, H, I); Pin Loading Pin Name A B C D E F G H I ANE2 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 Equivalent Loads ANE4 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 ANE6 2.
1 2.
1 2.
1 2.
1 2.
1 2.
1 2.
1 2.
1 2.
1 ® 3-34 $1([ ® $0,+* PLFURQ &026 *DWH $UUD\ Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) ANE2 7.
0 TBD 12.
7 ANE4 8.
0 TBD 13.
8 ANE6 14.
0 TBD 23.
2 a.
See page 2-15 for power equation.
Core Logic 3-35 $1([ ® $0,+* PLFURQ &026 *DWH $UU...

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