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CY7C1563XV18

Part Number	CY7C1563XV18
Manufacturer	Cypress Semiconductor
Description	72-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture
Published	Mar 14, 2017
Detailed Description	CY7C1563XV18/CY7C1565XV18 72-Mbit QDR® II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) 72-Mbit QD...
Datasheet	CY7C1563XV18 PDF File

Overview

CY7C1563XV18/CY7C1565XV18 72-Mbit QDR® II+ Xtreme SRAM Four-Word Burst Architecture (2.
5 Cycle Read Latency) 72-Mbit QDR® II+ Xtreme SRAM Four-Word Burst Architecture (2.
5 Cycle Read Latency) Features ■ Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions ■ 633 MHz Clock for High Bandwidth ■ Four-word Burst for Reducing Address Bus Frequency ■ Double Data Rate (DDR) Interfaces on both Read and Write Ports (data transferred at 1266 MHz) at 633 MHz ■ Available in 2.
5 Clock Cycle Latency ■ Two Input Clocks (K and K) for precise DDR Timing ❐ SRAM uses rising edges only ■ Echo Clocks (CQ and CQ) simplify Data Capture in High Speed Systems ■ Data Valid Pin (QVLD) to i...

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CY7C1563XV18 72-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture - Cypress Semiconductor

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