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SN74LS48

Motorola
Part Number SN74LS48
Manufacturer Motorola
Description BCD TO 7-SEGMENT DECODER
Published Jan 9, 2017
Detailed Description BCD TO 7-SEGMENT DECODER The SN54 / 74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and sev...
Datasheet PDF File SN74LS48 PDF File

SN74LS48
SN74LS48


Overview
BCD TO 7-SEGMENT DECODER The SN54 / 74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and seven AND-OR-INVERT gates.
Seven NAND gates and one driver are connected in pairs to make BCD data and its complement available to the seven decoding AND-OR-INVERT gates.
The remaining NAND gate and three input buffers provide lamp test, blanking input/rippleblanking input for the LS48.
The circuit accepts 4-bit binary-coded-decimal (BCD) and, depending on the state of the auxiliary inputs, decodes this data to drive other components.
The relative positive logic output levels, as well as conditions required at the auxiliary inputs, are shown in the truth tables.
The LS48 circu...



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