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These triple gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors All inputs are protected against static discharge with diodes to VDD and VSS Features Y Y Y Y Wide supply voltage range High noise immunity 5V – 10V paramet.
Y Y Y Y
Wide supply voltage range High noise immunity 5V
– 10V parametric ratings Low power
3 0V to 15V 0 45 VDD (typ )
Connection Diagrams
Dual-In-Line Packages CD4023M CD4023C CD4025M CD4025C
TL F 5955
– 1
TL F 5955
– 2
Top View Order Number CD4023 or CD4025
Top View
C1995 National Semiconductor Corporation
TL F 5955
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications
Voltage at Any Pin Operating Temperature Range C.
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