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AD9577

Part Number	AD9577
Manufacturer	Analog Devices
Description	Clock Generator
Published	Jan 4, 2017
Detailed Description	Data Sheet Clock Generator with Dual PLLs, Spread Spectrum, and Margining AD9577 FEATURES Fully integrated dual PLL/VC...
Datasheet	AD9577 PDF File

Overview

Data Sheet Clock Generator with Dual PLLs, Spread Spectrum, and Margining AD9577 FEATURES Fully integrated dual PLL/VCO cores 1 integer-N and 1 fractional-N PLL Continuous frequency coverage from 11.
2 MHz to 200 MHz Most frequencies from 200 MHz to 637.
5 MHz available PLL1 phase jitter (12 kHz to 20 MHz): 460 fs rms typical PLL2 phase jitter (12 kHz to 20 MHz) Integer-N mode: 470 fs rms typical Fractional-N mode: 660 fs rms typical Input crystal or reference clock frequency Optional reference frequency divide-by-2 I2C programmable output frequencies Up to 4 LVDS/LVPECL or up to 8 LVCMOS output clocks 1 CMOS buffered reference clock output Spread spectrum: downspread [0, −0.
5]% 2 pin-controlled frequency maps: margining Integrated loop filters Space saving, 6 mm × 6 mm, 40-lead LFCSP package 1.
02 W power dissipation (LVDS operation) 1.
235 W power dissipation (LVPECL operation) 3.
3 V operation APPLICATIONS Low jitter, low phase noise multioutput clock generator for data communicatio...

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