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74LVC2G126-Q100

NXP
Part Number 74LVC2G126-Q100
Manufacturer NXP
Description Bus buffer/line driver
Published Sep 29, 2016
Detailed Description 74LVC2G126-Q100 Bus buffer/line driver; 3-state Rev. 1 — 13 May 2015 Product data sheet 1. General description The 74L...
Datasheet PDF File 74LVC2G126-Q100 PDF File

74LVC2G126-Q100
74LVC2G126-Q100

Overview
74LVC2G126-Q100 Bus buffer/line driver; 3-state Rev.
1 — 13 May 2015 Product data sheet 1.
General description The 74LVC2G126-Q100 is a dual non-inverting buffer/line driver with 3-state outputs.
An output enable input (pin nOE) controls each 3-state output.
A LOW-level at pin nOE causes the output to assume a high-impedance OFF-state.
Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.
Inputs can be driven from either 3.
3 V or 5 V devices.
This feature allows the use of the 74LVC2G126-Q100 as a translator in a mixed 3.
3 V and 5 V environment.
It is fully specified for partial power-down applications using IOFF.
The IOFF circuitry dis...


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