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W132 Datasheet

Spread Aware/ Ten/Eleven Output Zero Delay Buffer

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W132
Spread Aware™, Ten/Eleven Output Zero Delay Buffer
Features
• Spread Aware™—designed to work with SSFTG refer-
ence signals
• Well suited to both 100- and 133-MHz designs
• Ten (-09B) or Eleven (-10B) LVCMOS/LVTTL outputs
• Single output enable pin for -10 version, dual pins on
-09 devices allow shutting down a portion of the out-
puts.
• 3.3V power supply
• On board 25damping resistors
• Available in 24-pin TSSOP package
Block Diagram
Key Specifications
Operating Voltage: ................................................ 3.3V±10%
Operating Range: ........................25 MHz < fOUT < 140 MHz
Cycle-to-Cycle Jitter: ................................................<150 ps
Output to Output Skew: ............................................<100 ps
Phase Error Jitter: .....................................................<125 ps
Pin Configurations
FBIN
CLK
PLL
OE0:4
OE
OE5:8
FBOUT
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
configuration of these blocks dependent upon specific option being used
AGND
VDD
Q0
Q1
Q2
GND
GND
Q3
Q4
VDD
OE
FBOUT
1
2
3
4
5
6
7
8
9
10
11
12
AGND
VDD
Q0
Q1
Q2
GND
GND
Q3
Q4
VDD
OE0:4
FBOUT
1
2
3
4
5
6
7
8
9
10
11
12
24 CLK
23 AVDD
22 VDD
21 Q9
20 Q8
19 GND
18 GND
17 Q7
16 Q6
15 Q5
14 VDD
13 FBIN
24 CLK
23 AVDD
22 VDD
21 Q8
20 Q7
19 GND
18 GND
17 Q6
16 Q5
15 VDD
14 OE5:8
13 FBIN
Spread Aware is a trademark of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
December 3, 1999, rev. **.1
Cypress Semiconductor
Cypress Semiconductor



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