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TC55B8128P-12 Datasheet

128K x 4-Bit BiCMOS Static RAM

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TC55B8128P-12 pdf
TOSHIBA
1l:55B8128P/]-12/15/20
SILICON GATE BiCMOS
131,072 WORD x 8 BIT BiCMOS STATIC RAM
Description
The TC55B8128P/J is a 1,048,576 bit high speed BiCMOS static random access memory organized as 131,072 words by 8 bits
and operated from a single 5V supply. Toshiba's BiCMOS technology and advanced circuit design enable.!:!!9h speed operation.
The TC55B8128P/J features low power dissipation when the device is deselected using chip enable (CE), and has an output
enable input (OE) for fast memory access.
The TC55B8128P/J is suitable for use in high speed applications such as cache memory and high speed storage. All inputs and
outputs are TIL compatible.
The TC55B8128P/J is available in a 400mil width, 32-pin DIP and SOJ suitable for high density surface assembly.
Features
• Fast access time
- TC55B8128P/J-12 12ns (max.)
- TC55B8128P/J-15 15ns (max.)
- TC55B8128P/J-20 20ns (max.)
• Low power dissipation
- Operation:
- TC55B8128P/J-12 150mA (max.)
- TC55B8128P/J-15 150mA (max.)
- TC55B8128P/J-20 150mA (max.)
- Standby:
15mA (max.)
• Single 5V power supply: 5V±10%
• Fully static operation
• Inputs and outputs TIL compatible
• Output buffer control: OE
• Package:
- TC55B8128P: DIP32-P-400
- TC55B8128J: SOJ32-P-400A
Pin Names
AD - A16
1/01 - 1/08
CE
WE
OE
Voo
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power (+5V)
Ground
Pin Connection (Top View)
A3 A4
A2 AS
Al A6
AO A7
CE ot
Vat V08
1102 1107
Voo GNO
GNO Voo
V03 1106
wr1104 1105
A8
A16 A9
A1S AlO
Al4 All
All Al2
TCS588l28J
A3 A4
A2 AS
At A6
AO A7
tI M
VOl 1108
V02 V07
VOO GNO
GNO Voo
V03 1106
V04 vas
WI A8
A16 A9
A1S AtO
At4 Atl
A13 A12
TOSHIBA AMERICA ELECTRONIC COMPDNENTS. INC.
8-115
Toshiba
Toshiba



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