Dual N-Channel Enhancement Mode Field Effect Transistor
SO-8 N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to provide superior switching performance
and minimize on-state resistance. These devices are
particularly suited for low voltage applications such as disk
drive motor control, battery powered circuits where fast
switching, low in-line power loss, and resistance to transients
Low gate charge.
5.0 A, 30 V. RDS(ON) = 0.040 Ω @ VGS = 10 V.
High density cell design for extremely low R .DS(ON)
High power and current handling capability in a widely
used surface mount package.
Dual MOSFET in surface mount package.
Absolute Maximum Ratings TA = 25oC unless other wise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation
TJ,TSTG Operating and Storage Temperature Range
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC Thermal Resistance, Junction-to-Case (Note 1)
© 1997 Fairchild Semiconductor Corporation
-55 to 150