Dual N-Channel Enhancement Mode Field Effect Transistor
SO-8 N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to provide superior switching
performance and minimize on-state resistance. These devices
are particularly suited for low voltage applications such as disk
drive motor control, battery powered circuits where fast
switching, low in-line power loss, and resistance to transients
5.5 A, 30 V. RDS(ON) = 0.030 Ω @ VGS = 4.5 V
RDS(ON) = 0.038 Ω @ VGS = 2.5 V.
High density cell design for extremely low RDS(ON).
Combines low gate threshold (fully enhanced at 2.5V) with
high breakdown voltage of 30 V.
High power and current handling capability in a widely
used surface mount package.
Dual MOSFET in surface mount package.
Absolute Maximum Ratings TA = 25oC unless other wise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation (Note 1a)
TJ,TSTG Operating and Storage Temperature Range
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC Thermal Resistance, Junction-to-Case (Note 1)
© 1998 Fairchild Semiconductor Corporation
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