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FDPC8016S Datasheet

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Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted
10
ID = 35 A
8
VDD = 13 V
6
VDD = 10 V
4
VDD = 15 V
2
0
0 20 40 60 80
Qg, GATE CHARGE (nC)
Figure 20. Gate Charge Characteristics
10000
1000
Ciss
Coss
100
f = 1 MHz
VGS = 0 V
Crss
10
0.1
1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
25
Figure 21. Capacitance vs. Drain
to Source Voltage
50
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
1
0.001
0.01 0.1 1 10 100
tAV, TIME IN AVALANCHE (ms)
1000
Figure 22. Unclamped Inductive
Switching Capability
1000
100 10 μs
10 THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
1 TJ = MAX RATED
RθJC = 3.0 oC/W
TC = 25 oC
0.1
0.1 1
CURVE BENT TO
MEASURED DATA
10
100 μs
1 ms
10 ms
DC
80
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 24. Forward Bias Safe
Operating Area
160
140
120
VGS = 10 V
100
80
Limited by Package
60
RθJC = 3.0 oC/W
40
VGS = 4.5 V
20
0
25 50 75 100 125
TC, CASE TEMPERATURE (oC)
150
Figure 23. Maximum Continuous Drain
Current vs. Case Temperature
10000
1000
SINGLE PULSE
RθJC = 3.0 oC/W
TC = 25 oC
100
10
10-5
10-4
10-3
10-2
10-1
t, PULSE WIDTH (sec)
Figure 25. Single Pulse Maximum
Power Dissipation
1
©2013 Fairchild Semiconductor Corporation
FDPC8016S Rev.C7
8
www.fairchildsemi.com
Fairchild Semiconductor
Fairchild Semiconductor



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