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FDPC8016S Datasheet

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FDPC8016S pdf
Dimensional Outline and Pad Layout
0.10 C
2X
4
5.10
4.90
PKG
CL
1
PKG CL
PIN #1 5
8
INDICATOR
TOP VIEW
A
B
5.00
4.56
4.20
1.27
43 2
1
1.01
3.30
2.48
2.08
6.10
5.90
0.10 C
2X
6.60
0.00
2.65
0.82
5 6 78
0.75
0.40
0.83
1.43
1.98
2.48
3.30
SEE
DETAIL A
RECOMMENDED LAND PATTERN
SIDE VIEW
3.15±.05
3.81
1.27
56 7 8
0.10
0.05
CAB
C
0.51
0.65±.05
2.46±.05
0.91±.05
0.49±.05
4 32
1
0.51±.05
3.90±.05
4.22±.05
5.00±.05
BOTTOM VIEW
1.57±.05
0.65±.05
1.37±.05
0.53±.05
0.48±.05
NOTES: UNLESS OTHERWISE SPECIFIED
A) DOES NOT FULLY CONFORM TO
JEDEC REGISTRATION, MO-229,
DATED 11/2001.
B) ALL DIMENSIONS ARE IN
MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE
BURRS OR MOLD FLASH. MOLD
FLASH OR BURRS DOES NOT
EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING
PER ASME Y14.5M-1994.
E) DRAWING FILE NAME:
0.10 C
0.08 C
0.80
0.70
0.30 0.05
0.20 0.00
(SCALE: 2X)
C
SEATING
PLANE
©2013 Fairchild Semiconductor Corporation
FDPC8016S Rev.C7
11
www.fairchildsemi.com
Fairchild Semiconductor
Fairchild Semiconductor


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