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FDMC8200S Datasheet

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FDMC8200S pdf
Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted
10
ID = 8.5 A
8
VDD = 15 V
6
VDD = 10 V
VDD = 20 V
4
2
0
0 2 4 6 8 10 12 14 16
Qg, GATE CHARGE (nC)
Figure 20. Gate Charge Characteristics
3000
1000
100
Ciss
Coss
f = 1 MHz
VGS = 0 V
Crss
10
0.1 1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 21. Capacitance vs Drain
to Source Voltage
20
10
TJ = 25 oC
TJ = 100 oC
TJ = 125 oC
1
0.01
0.1 1
10 30
tAV, TIME IN AVALANCHE (ms)
Figure 22. Unclamped Inductive
Switching Capability
15
12
VGS = 10 V
9
6 VGS = 4.5 V
Limited by package
3
RθJA = 50 oC/W
0
25 50 75 100 125
TA, CASE TEMPERATURE (oC)
150
Figure 23. Maximum Continuous Drain
Current vs Case Temperature
50
10 100 us
1 THIS AREA IS
LIMITED BY rDS(on)
1 ms
10 ms
100 ms
0.1
0.01
0.01
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
0.1 1
1s
10 s
DC
10 100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 24. Forward Bias Safe
Operating Area
100
VGS = 10 V
10
1
0.1
0.001
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
0.01 0.1 1 10
t, PULSE WIDTH (sec)
100 1000
Figure 25. Single Pulse Maximum Power
Dissipation
©2011 Fairchild Semiconductor Corporation
FDMC8200S Rev.C4
8
www.fairchildsemi.com
Fairchild Semiconductor
Fairchild Semiconductor


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