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EMD04N04H Datasheet

Field Effect Transistor

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EMD04N04H pdf
 
 
NChannel Logic Level Enhancement Mode Field Effect Transistor 
Product Summary: 
BVDSS 
40V 
D
RDSON (MAX.) 
4mΩ 
ID  80A  G
 
UIS, Rg 100% Tested 
S
PbFree Lead Plating & Halogen Free 
 
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) 
PARAMETERS/TEST CONDITIONS 
SYMBOL 
EMD04N04H
LIMITS 
UNIT 
GateSource Voltage 
Continuous Drain Current 
Pulsed Drain Current1 
TC = 25 °C 
TC = 100 °C 
Avalanche Current 
Avalanche Energy 
Repetitive Avalanche Energy2 
L = 0.1mH, ID=80A, RG=25Ω 
L = 0.05mH 
Power Dissipation 
TC = 25 °C 
TC = 100 °C 
Operating Junction & Storage Temperature Range 
VGS 
ID 
IDM 
IAS 
EAS 
EAR 
PD 
Tj, Tstg 
±30 
80 
48 
160 
80 
320 
160 
50 
20 
55 to 150 
V 
A 
mJ 
W 
°C 
100% UIS testing in condition of VD=20V, L=0.1mH, VG=10V, IL=50A, Rated VDS=40V N-CH 
THERMAL RESISTANCE RATINGS 
THERMAL RESISTANCE 
SYMBOL 
TYPICAL 
MAXIMUM 
UNIT 
JunctiontoCase 
RJC 
JunctiontoAmbient 
RJA 
1Pulse width limited by maximum junction temperature. 
2Duty cycle  1 
350°C / W when mounted on a 1 in2 pad of 2 oz copper. 
 
 
 
2.5 
°C / W 
50 
2015/1/12 
p.1 
Excelliance MOS
Excelliance MOS



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