3-in-1 Local Bus Fast Ethernet Controller
10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller
with Embedded SRAM
Document No.: AX796-17 / V1.7 / Jan. 25 ’02
• Highly integrated with embedded 10/100Mbps
MAC, PHY and Transceiver
• Embedded 8K * 16 bit SRAM
• Compliant with IEEE 802.3/802.3u
• NE2000 register level compatible instruction
• Single chip local CPU bus 10/100Mbps Fast
Ethernet MAC Controller
• Support both 8 bit and 16 bit local CPU interfaces
include MCS-51 series, 80186 series and MC68K
• Support both 10Mbps and 100Mbps data rate
• Support both full-duplex or half-duplex operation
• Provides an extra MII port for supporting other
media. For example, Home LAN application
• Support EEPROM interface to store MAC address
• External and internal loop-back capability
• Support Standard Print Port for printer server
• Support upto 3/1 General Purpose In/Out pins
• 128-pin LQFP low profile package
• Low Power Consumption, typical under 100mA
• 0.25 Micron low power CMOS process. 25MHz
Operation, Pure 3.3V operation with 5V I/O
*IEEE is a registered trademark of the Institute of
Electrical and Electronic Engineers, Inc.
*All other trademarks and registered trademark are
the property of their respective holders.
The AX88796 Fast Ethernet Controller is a high performance and highly integrated local CPU bus Ethernet Controller
with embedded 10/100Mbps PHY/Transceiver and 8K*16 bit SRAM. The AX88796 supports both 8 bit and 16 bit local
CPU interfaces include MCS-51 series, 80186 series, MC68K series CPU and ISA bus. The AX88796 implements both
10Mbps and 100Mbps Ethernet function based on IEEE802.3 / IEEE802.3u LAN standard. The AX88796 also provides
an extra IEEE802.3u compliant media-independent interface (MII) to support other media applications. Using MII
interface, Home LAN PHY type media can be supported.
As well as, the chip also provides optional Standard Print Port ( parallel port interface ), can be used for printer server
device or treat as simple general I/O port. The chip also support upto 3/1 additional General Purpose In/Out pins
System Block Diagram
Optional Print Port
Or General I/O Ports
Always contact ASIX for possible updates before starting a design.
This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without notice. No liability
is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
ASIX ELECTRONICS CORPORATION
First Released Date : July/31/2000
2F, NO.13, Industry East Rd. II, Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.