• Bit 0 – EERE: EEPROM Read Enable
The EEPROM Read Enable Signal EERE is the read strobe to the EEPROM. When the correct address is set
up in the EEAR Register, the EERE bit must be written to a logic one to trigger the EEPROM read. The
EEPROM read access takes one instruction, and the requested data is available immediately. When the
EEPROM is read, the CPU is halted for four cycles before the next instruction is executed.
The user should poll the EEPE bit before starting the read operation. If a write operation is in progress, it is
neither possible to read the EEPROM, nor to change the EEAR Register.
The calibrated Oscillator is used to time the EEPROM accesses. Table 8-2 on page 26 lists the typical
programming time for EEPROM access from the CPU.
Table 8-2. EEPROM programming time.
Number of calibrated RC oscillator cycles
Typical programming time