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7.4.1
The X-register, Y-register, and Z-register
The registers R26..R31 have some added functions to their general purpose usage. These registers are 16-bit
address pointers for indirect addressing of the data space. The three indirect address registers X, Y, and Z are
defined as described in Figure 7-3.
Figure 7-3.
X-register
The X-, Y-, and Z-registers.
15
7
R27 (0x1B)
XH
07
R26 (0x1A)
XL
0
0
Y-register
15
7
R29 (0x1D)
YH
07
R28 (0x1C)
YL
0
0
Z-register
15
7
R31 (0x1F)
ZH
0
7
R30 (0x1E)
ZL
0
0
In the different addressing modes these address registers have functions as fixed displacement, automatic
increment, and automatic decrement (see the instruction set reference for details).
7.5 Stack Pointer
The Stack is mainly used for storing temporary data, for storing local variables and for storing return addresses
after interrupts and subroutine calls. Note that the Stack is implemented as growing from higher to lower
memory locations. The Stack Pointer Register always points to the top of the Stack. The Stack Pointer points to
the data SRAM Stack area where the Subroutine and Interrupt Stacks are located. A Stack PUSH command will
decrease the Stack Pointer.
The Stack in the data SRAM must be defined by the program before any subroutine calls are executed or
interrupts are enabled. Initial Stack Pointer value equals the last address of the internal SRAM and the Stack
Pointer must be set to point above start of the SRAM, see Figure 8-2 on page 21.
See Table 7-1 for Stack Pointer details.
Table 7-1. Stack Pointer instructions.
Instruction Stack pointer
Description
PUSH
Decremented by 1 Data is pushed onto the stack
CALL
ICALL
RCALL
Decremented by 2 Return address is pushed onto the stack with a subroutine call or
interrupt
POP
Incremented by 1 Data is popped from the stack
RET
RETI
Incremented by 2 Return address is popped from the stack with return from
subroutine or return from interrupt
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of bits actually used
is implementation dependent, see Table 7-2 on page 15. Note that the data space in some implementations of
the AVR architecture is so small that only SPL is needed. In this case, the SPH Register will not be present.
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P [DATASHEET]
Atmel-8272G-AVR-01/2015
14
ATMEL Corporation
ATMEL Corporation


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