Stack Pointer Register Low and High byte
The SPL and SPH register pair represents the 16-bit value, SP.The low byte [7:0] (suffix L) is accessible
at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For more details on
reading and writing 16-bit registers, refer to Accessing 16-bit Registers.
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset
addresses. The device is a complex microcontroller with more peripheral units than can be supported
within the 64 locations reserved in Opcode for the IN and OUT instructions. For the Extended I/O space
from 0x60 in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
Name: SPL and SPH
Property: When addressing I/O Registers as data space the offset address is 0x3D
14 13 12 11 10
R RW RW RW RW RW RW
Bit 7 6 5 4 3 2 1 0
SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13 – SPn: Stack Pointer Register
SPL and SPH are combined into SP.
Atmel ATmega1284 [DATASHEET]