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6. I/O Multiplexing
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be
assigned to one of the peripheral functions.
The following table describes the peripheral signals multiplexed to the PORT I/O pins.
Table 6-1. PORT Function Multiplexing
32-pin
40-pin
TQFP/ QFN/ PIPD Pin
MLF Pin # #
16
27
38
49
5 10
6 11
7 12
8 13
9 14
10 15
11 16
12 17
13 18
14 19
15 20
16 21
17 -
18 -
19 22
20 23
21 24
22 25
23 26
24 27
25 28
26 29
27 30
28 31
29 32
30 33
31 34
32 35
33 36
DRQFN Pin# VFBGA Pin# PAD EXTINT PCINT ADC/AC OSC T/C # 0 T/C # 1 USART I2C SPI JTAG
A1 B2
B1 B1
A2 C3
B2 C2
A3 A5
B3 A1
A4 D2
B4 E1
A5 D3
B5 E2
A6 F1
A7 F2
B6 G2
A8 E3
B7 F3
A9 E4
B8 C1
A10 A4
B9 F4
A11 G5
B10 F5
A12 G6
A13 F6
B11 E5
A14 F7
B12 E6
A15 E7
B13 D1
A16 C7
B14 D6
A17 C6
B15 B7
A18 D5
PB[5]
PB[6]
PB[7]
RESET
VCC
GND
XTAL2
XTAL1
PD[0]
PD[1]
PD[2] INT0
PD[3] INT1
PD[4]
PD[5]
PD[6]
PD[7]
VCC
GND
PC[0]
PC[1]
PC[2]
PC[3]
PC[4]
PC[5]
PC[6]
PC[7]
AVCC
GND
AREF
PA[7]
PA[6]
PA[5]
PA[4]
PCINT13
PCINT14
PCINT15
PCINT24
PCINT25
PCINT26
PCINT27
PCINT28
PCINT29
PCINT30
PCINT31
PCINT16
PCINT17
PCINT18
PCINT19
PCINT20
PCINT21
PCINT22
PCINT23
AREF
PCINT7 ADC7
PCINT6 ADC6
PCINT5 ADC5
PCINT4 ADC4
MOSI
MISO
SCK
RxD0
TxD0
RxD1
TXD1
OC1B XCK1
OC1A
OC2B ICP1
OC2A
RxD2
TxD2
TOSC1
TOSC2
MISO1
MOSI1
SCL
SDA
TCK
TMS
TDO
TDI
Atmel ATmega1284 [DATASHEET]
Atmel-42718B-ATmega1284_Datasheet_Complete-08/2016
16
ATMEL
ATMEL


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