Figure 11. External Memory with Sector Select
Memory Configuration A
Memory Configuration B
(0-60K x 8)
(0-60K x 8)
Using the External
ATmega128 in non ATmega103 compatibility mode: Memory Configuration A is available (Memory
Configuration B N/A)
ATmega128 in ATmega103 compatibility mode: Memory Configuration B is available (Memory
Configuration A N/A)
Both External Memory Control Registers (XMCRA and XMCRB) are placed in Extended I/O
space. In ATmega103 compatibility mode, these registers are not available, and the features
selected by these registers are not available. The device is still ATmega103 compatible, as
these features did not exist in ATmega103. The limitations in ATmega103 compatibility mode
• Only two wait-states settings are available (SRW1n = 0b00 and SRW1n = 0b01).
• The number of bits that are assigned to address high byte are fixed.
• The External Memory section can not be divided into sectors with different wait-state
• Bus-keeper is not available.
• RD, WR and ALE pins are output only (Port G in ATmega128).
The interface consists of:
• AD7:0: Multiplexed low-order address bus and data bus.
• A15:8: High-order address bus (configurable number of bits).
• ALE: Address latch enable.
• RD: Read strobe.
• WR: Write strobe.