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AD5668 Datasheet
SPI Voltage Output denseDAC
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Data Sheet
Octal, 12-/14-/16-Bit SPI Voltage Output
denseDAC with 5 ppm/°C On-Chip Reference
AD5628/AD5648/AD5668
FEATURES
Low power, small footprint, pin-compatible octal DACs
AD5668: 16 bits
AD5648: 14 bits
AD5628: 12 bits
14-lead/16-lead TSSOP, 16-lead LFCSP, and 16-lead WLCSP
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
Power down to 400 nA at 5 V, 200 nA at 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale or midscale
3 power-down functions
Hardware LDAC and LDAC override function
CLR function to programmable code
Rail-to-rail operation
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5628/AD5648/AD5668 devices are low power, octal,
12-/14-/16-bit, buffered voltage-output DACs. All devices
operate from a single 2.7 V to 5.5 V supply and are guaranteed
monotonic by design. The AD5668 and AD5628 are available in
both a 4 mm × 4 mm LFCSP and a 16-lead TSSOP, while the
AD5648 is available in both a 14-lead and 16-lead TSSOP.
The AD5628/AD5648/AD5668 have an on-chip reference with
an internal gain of 2. The AD5628-1/AD5648-1/AD5668-1 have
a 1.25 V 5 ppm/°C reference, giving a full-scale output range
of 2.5 V; the AD5628-2/AD5648-2/AD5668-2 and AD5668-3 have
a 2.5 V 5 ppm/°C reference, giving a full-scale output range of
5 V. The on-board reference is off at power-up, allowing the use
of an external reference. The internal reference is enabled via a
software write.
The part incorporates a power-on reset circuit that ensures that the
DAC output powers up to 0 V (AD5628-1/AD5648-1/AD5668-1,
AD5628-2/AD5648-2/AD5668-2) or midscale (AD5668-3) and
remains powered up at this level until a valid write takes place.
The part contains a power-down feature that reduces the current
consumption of the device to 400 nA at 5 V and provides software-
Rev. I
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rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAM
SCLK
SYNC
DIN
VDD
AD5628/AD5648/AD5668
LDAC
INTERFACE
LOGIC
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
POWER-ON
RESET
VREFIN/VREFOUT
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
1.25V/2.5V
REF
STRING
DAC A
BUFFER
STRING
DAC B
BUFFER
STRING
DAC C
BUFFER
STRING
DAC D
BUFFER
STRING
DAC E
BUFFER
STRING
DAC F
BUFFER
STRING
DAC G
BUFFER
STRING
DAC H
BUFFER
POWER-DOWN
LOGIC
LDAC1 CLR1
1RU-16 AND WLCSP PACKAGE ONLY.
Figure 1.
GND
VOUTA
VOUTB
VOUTC
VOUTD
VOUTE
VOUTF
VOUTG
VOUTH
selectable output loads while in power-down mode for any or all
DAC channels. The outputs of all DACs can be updated simul-
taneously using the LDAC function, with the added functionality
of user-selectable DAC channels to simultaneously update. There
is also an asynchronous CLR that updates all DACs to a user-
programmable code—zero scale, midscale, or full scale.
The AD5628/AD5648/AD5668 utilize a versatile 3-wire serial
interface that operates at clock rates of up to 50 MHz and is
compatible with standard SPI®, QSPI™, MICROWIRE™, and
DSP interface standards. The on-chip precision output amplifier
enables rail-to-rail output swing.
PRODUCT HIGHLIGHTS
1. Octal, 12-/14-/16-bit DAC.
2. On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
3. Available in 14-lead/16-lead TSSOP, 16-lead LFCSP, and
16-lead WLCSP.
4. Power-on reset to 0 V or midscale.
5. Power-down capability. When powered down, the DAC
typically consumes 200 nA at 3 V and 400 nA at 5 V.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2005–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

AD5668 Datasheet PDF



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