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AD5660 Datasheet
12-/14-/16-Bit nanoDAC
Analog Devices
Analog Devices


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AD5660 pdf
AD5620/AD5640/AD5660
VDD
1
2 VREF
VOUT
3
CH1 1.20V CH2 1.00V
CH3 100mV
M100µs
CH1 1.87V
Figure 30. Power-On Reset to 0 V—AD5660-1
SCLK
1
VDD = 3V
3
VOUT
CH1 2.00V
CH3 50.0mV
M1.00µs
CH2 520mV
Figure 31. Exiting Power-Down to Midscale
Data Sheet
1.250800
1.250600
1.250400
1.250200
1.250000
1.249800
1.249600
1.249400
1.249200
1.249000
1.248800
1.248600
1.248400
0
VDD = 3V
VREFOUT = 1.25V
TA = 25°C
13nS/SAMPLE NUMBER
1LSB CHANGE AROUND MIDSCALE
(0x7FFF TO 0x8000)
GLITCH IMPULSE = 0.284nV-s
50 100 150 200 250 300 350 400 450 500 550
SAMPLE NUMBER
Figure 33. Digital-to-Analog Glitch Impulse—AD5660-1
2.500250
2.500200
2.500150
2.500100
2.500050
2.500000
2.499950
2.499900
2.499850
2.499800
2.499750
2.499700
2.499650
2.499600
0
VDD = 5V
TA = 25°C
20nS/SAMPLE NUMBER
DAC LOADED WITH MIDSCALE
DIGITAL FEEDTHROUGH = 0.06nV-s
50 100 150 200 250 300 350 400 450 500 550
SAMPLE NUMBER
Figure 34. Digital Feedthrough
2.501250
2.501000
2.500750
2.500500
2.500250
2.500000
2.499750
2.499500
2.499250
2.499000
2.498750
2.498500
2.498250
2.498000
0
VDD = 5V
VREFOUT = 2.5V
TA = 25°C
13nS/SAMPLE NUMBER
1LSB CHANGE AROUND MIDSCALE
(0x7FFF TO 0x8000)
GLITCH IMPULSE = 0.497nV-s
50 100 150 200 250 300 350 400 450 500 550
SAMPLE NUMBER
Figure 32. Digital-to-Analog Glitch Impulse—AD5660-2/AD5660-3
16
TA = 25°C
14
12
VDD = 3V
10
8 VDD = 5V
6
4
012 34567 89
CAPACITANCE (nF)
Figure 35. Settling Time vs. Capacitive Load
10
Rev. G | Page 14 of 28

AD5660 Datasheet PDF



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