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AD548 Datasheet

Low Power BiFET Op Amp

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AD548
Figure 2. Board Layout for Guarding Inputs
INPUT PROTECTION
The AD548 is guaranteed to withstand input voltages equal to
the power supply potential. Exceeding the negative supply volt-
age on either input will forward bias the substrate junction of
the chip. The induced current may destroy the amplifier due to
excess heat.
Input protection is required in applications such as a flame
detector in a gas chromatograph, where a very high potential
may be applied to the input terminals during a sensor fault
condition. Figure 3 shows a simple current limiting scheme that
can be used. RPROTECT should be chosen such that the maxi-
mum overload current is 1.0 mA (l00 kfor a 100 V overload,
for example).
Exceeding the negative common-mode range on either input
terminal causes a phase reversal at the output, forcing the
amplifier output to the corresponding high or low state. Exceed-
ing the negative common-mode on both inputs simultaneously
forces the output high. Exceeding the positive common-mode
range on a single input does not cause a phase reversal, but if
both inputs exceed the limit the output will be forced high. In
all cases, normal amplifier operation is resumed when input
voltages are brought back within the common-mode range.
Figure 4. AD548 Used as DAC Output Amplifier
That is:
VOS
Output
= VOS
Input
1+
RFB
RO

RFB is the feedback resistor for the op amp, which is internal to
the DAC. RO is the DAC’s R-2R ladder output resistance. The
value of RO is code dependent. This has the effect of changing
the offset error voltage at the amplifier’s output. An output
amplifier with a sub millivolt input offset voltage is needed to
preserve the linearity of the DAC’s transfer function.
The AD548 in this configuration provides a 700 kHz small
signal bandwidth and 1.8 V/µs typical slew rate. The 33 pF
capacitor across the feedback resistor optimizes the circuit’s
response. The oscilloscope charts in Figures 5 and 6 show small
and large signal outputs of the circuit in Figure 4. Upper traces
show the input signal VIN. Lower traces are the resulting output
voltage with the DAC’s digital input set to all 1s. The AD548
settles to ± 0.01% for a 20 V input step in 14 µs.
5V
100
90
20V
5µS
10
0%
Figure 5. Response to ±20 V p-p Reference Square Wave
Figure 3. Input Protection of IV Converter
D/A CONVERTER OUTPUT BUFFER
The circuit in Figure 4 shows the AD548 and AD7545 12-bit
CMOS D/A converter in a unipolar binary configuration. VOUT
will be equal to VREF attenuated by a factor depending on the
digital word. VREF sets the full scale. Overall gain is trimmed by
adjusting RIN. The AD548’s low input offset voltage, low drift,
and clean dynamics make it an attractive low power output buffer.
The input offset voltage of the AD548 output amplifier results
in an output error voltage. This error voltage equals the input
offset voltage of the op amp times the noise gain of the amplifier.
50mV
100
90
200mV
2µS
10
0%
Figure 6. Response to ±100 mV p-p Reference Square Wave
–8– REV. D
Analog Devices
Analog Devices


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