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AD5170 Datasheet

I2C Digital Potentiometer

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AD5170
Parameter
DYNAMIC CHARACTERISTICS13
–3 dB Bandwidth
Total Harmonic Distortion
VW Settling Time
Resistor Noise Voltage Density
Symbol
BW_2.5k
THDW
tS
eN_WB
Conditions
Min
Code = 0x80
VA = 1 V rms, VB = 0 V, f = 1 kHz
VA = 5 V, VB = 0 V, ±1 LSB error
band
RWB = 1.25 kΩ, f = 1 kHz
Typ1 Max
4.8
0.1
1
3.2
Unit
MHz
%
μs
nV/√Hz
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from the ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
5 The A, B, and W resistor terminals have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
7 Measured at the A terminal. The A terminal is open circuited in shutdown mode.
8 The minimum voltage requirement on the VIH is 0.7 V × VDD. For example, VIH minimum = 3.5 V when VDD = 5 V. It is typical for the SCL and SDA resistors to be pulled
up to VDD. However, care must be taken to ensure that the minimum VIH is met when the SCL and SDA are driven directly from a low voltage logic controller without
pull-up resistors.
9 Different from operating power supply; power supply for OTP is used one time only.
10 Different from operating current; supply current for OTP lasts approximately 400 ms for use one time only.
11 See Figure 26 for the energy plot during OTP program.
12 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
13 All dynamic characteristics use VDD = 5 V.
ELECTRICAL CHARACTERISTICS: 10 kΩ, 50 kΩ, AND 100 kΩ
VDD = 5 V ± 10% or 3 V ± 10%, VA = VDD, VB = 0 V, −40°C < TA < +125°C, unless otherwise noted.
Table 2.
Parameter
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity2
Resistor Integral Nonlinearity2
Nominal Resistor Tolerance3
Resistance Temperature Coefficient
RWB (Wiper Resistance)
DC CHARACTERISTICS—POTENTIOMETER DIVIDER
MODE (SPECIFICATIONS APPLY TO ALL VRs)
Differential Nonlinearity4
Integral Nonlinearity4
Voltage Divider Temperature Coefficient
Full-Scale Error
Zero-Scale Error
RESISTOR TERMINALS
Voltage Range5
Capacitance A, Capacitance B6
Capacitance W6
Shutdown Supply Current7
Common-Mode Leakage
DIGITAL INPUTS AND OUTPUTS
Input Logic High (SDA and SCL)8
Input Logic Low (SDA and SCL)8
Input Logic High (AD0 and AD1)
Input Logic Low (AD0 and AD1)
Input Current
Input Capacitance6
Symbol
Conditions
R-DNL
R-INL
∆RAB
(∆RAB/RAB)/∆T
RWB
RWB, VA = no connect
RWB, VA = no connect
TA = 25°C
Code = 0x00, VDD = 5 V
Min Typ1 Max
−1 ±0.1 +1
−2.5 ±0.25 +2.5
−20 +20
35
160 200
Unit
LSB
LSB
%
ppm/°C
Ω
DNL
INL
(∆VW/VW)/∆T
VWFSE
VWZSE
Code = 0x80
Code = 0xFF
Code = 0x00
−1 ±0.1 +1
−1 ±0.3 +1
15
−2.5 −1
0
0 1 2.5
LSB
LSB
ppm/°C
LSB
LSB
VA, VB, VW
CA, CB
CW
IA_SD
ICM
GND
VDD
f = 1 MHz, measured to GND,
code = 0x80
45
f = 1 MHz, measured to GND,
code = 0x80
60
VDD = 5.5 V
0.01 1
VA = VB = VDD/2
1
V
pF
pF
μA
nA
VIH VDD = 5 V
VIL VDD = 5 V
VIH VDD = 3 V
VIL VDD = 3 V
IIL VIN = 0 V or 5 V
CIL
0.7 VDD
−0.5
2.1
5
VDD + 0.5
+0.3 VDD
0.6
±1
V
V
V
V
μA
pF
Rev. G | Page 5 of 24
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