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(Datasheet) AD5170

I2C Digital Potentiometer

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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
B1
A2
AD0 3
GND 4
VDD 5
10 W
AD5170
TOP VIEW
(Not to Scale)
9 NC
8 AD1
7 SDA
6 SCL
Figure 3. Pin Configuration
AD5170
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1B
B Terminal. GND ≤ VB ≤ VDD.
2A
A Terminal. GND ≤ VA ≤ VDD.
3 AD0
Programmable Address Bit 0 for Multiple Package Decoding.
4 GND Digital Ground.
5 VDD
Positive Power Supply. Specified for operation from 2.7 V to 5.5 V. For OTP programming, the VDD supply must be
within the 5.6 V to 5.8 V range and capable of driving 100 mA.
6 SCL
Serial Clock Input. Positive edge triggered. Requires a pull-up resistor. If it is driven directly from a logic controller
without the pull-up resistor, ensure that VIH minimum is 0.7 V × VDD.
7 SDA
Serial Data Input/Output. Requires a pull-up resistor. If it is driven directly from a logic controller without the
pull-up resistor, ensure that VIH minimum is 0.7 V × VDD.
8 AD1
Programmable Address Bit 1 for Multiple Package Decoding.
9 NC
No Connect.
10 W
W Terminal. GND ≤ VW ≤ VDD.
Rev. G | Page 9 of 24
Analog Devices
Analog Devices


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