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AD5160 Datasheet
256-Position SPI-Compatible Digital Potentiometer
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AD5160
Data Sheet
10 kΩ, 50 kΩ, 100 kΩ VERSIONS
VDD = 5 V ± 10%, or 3 V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < +125°C; unless otherwise noted.
Table 2.
Parameter
DC CHARACTERISTICS
Rheostat Mode
Resistor Differential Nonlinearity2
Resistor Integral Nonlinearity2
Nominal Resistor Tolerance3
Resistance Temperature Coefficient
Wiper Resistance
Potentiometer Divider Mode
Resolution
Differential Nonlinearity4
Integral Nonlinearity4
Voltage Divider Temperature
Coefficient
Full-Scale Error
Zero-Scale Error
RESISTOR TERMINALS
Voltage Range5
Capacitance A, Capacitance B6
Capacitance W6
Common-Mode Leakage
DIGITAL INPUTS
Input Logic High
Input Logic Low
Input Logic High
Input Logic Low
Input Current
Input Capacitance6
POWER SUPPLIES
Power Supply Range
Supply Current
Power Dissipation7
Power Supply Sensitivity
DYNAMIC CHARACTERISTICS6, 8
Bandwidth –3 dB
Total Harmonic Distortion
VW Settling Time (10 kΩ/50 kΩ/100 kΩ)
Resistor Noise Voltage Density
Symbol Conditions
Min Typ1
Max Unit
R-DNL
R-INL
∆RAB
∆RAB/∆T
RW
N
DNL
INL
∆VW/∆T
RWB, VA = no connect
RWB, VA = no connect
TA = 25°C
VAB = VDD,
Wiper = no connect
VDD = 5 V
Specifications apply to all VRs
Code = 0x80
VWFSE
VWZSE
Code = 0xFF
Code = 0x00
−1 ±0.1
−2 ±0.25
−15
45
50
−1 ±0.1
−1 ±0.3
15
−3 −1
01
+1 LSB
+2 LSB
+15 %
ppm/°C
120 Ω
8 Bits
+1 LSB
+1 LSB
ppm/°C
0 LSB
3 LSB
VA,B,W
CA,B
CW
ICM
f = 1 MHz, measured to GND, code =
0x80
f = 1 MHz, measured to GND, code =
0x80
VA = VB = VDD/2
GND
45
60
1
VDD V
pF
pF
nA
VIH
VIL
VIH VDD = 3 V
VIL VDD = 3 V
IIL VIN = 0 V or 5 V
CIL
2.4
2.1
5
V
0.8 V
V
0.6 V
±1 µA
pF
VDD RANGE
IDD
PDISS
PSS
VIH = 5 V or VIL = 0 V
VIH = 5 V or VIL = 0 V, VDD = 5 V
∆VDD = +5 V ± 10%, code = midscale
2.7
3
±0.02
5.5
8
0.2
±0.05
V
µA
mW
%/%
BW
THDW
tS
eN_WB
RAB = 10 kΩ/50 kΩ/100 kΩ, Code = 0x80
VA = 1 V rms, VB = 0 V, f = 1 kHz, RAB =
10 kΩ
VA = 5 V, VB = 0 V,
±1 LSB error band
RWB = 5 kΩ
600/100/40
0.05
2
9
kHz
%
µs
nV/√Hz
1 Typical specifications represent average readings at +25°C and VDD = 5 V.
2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output digital-to-analog converter (DAC). VA = VDD and VB =
0 V. DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
5 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
7 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
8 All dynamic characteristics use VDD = 5 V.
Rev. C | Page 4 of 16

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