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91C142 Datasheet

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om Universe IIPCI-to-VMEbus Bridge
t4U.cFeatures
hee• Industry-proven, high performance
Swww.data6s4h-ebeitt4uV.cMomEbus interconnect
ta• Fully compliant, 32-bit or 64-bit,
a33 MHz PCI bus interconnect
.D• Integral FIFOs for write posting to
wmaximize bandwidth utilization
w• Programmable DMA controller with
w Linked-List mode
m• Flexible interrupt logic
o• Sustained transfer rates up to
60-70 Mbytes/s
U.cThe Universe II is the industry standard
PCI bus-to-VMEbus bridge.
et4• Extensive suite of VMEbus address
eand data transfer modes
• Automatic initialization for slave-only
happlications
S• Flexible register set, programmable
from both the PCI bus and VMEbus
taports
• Full VMEbus system controller
a• Support for RMWs, ADOH, PCI
LOCK cycles, and semaphores
.D• Commercial, industrial, and extended
temperature variants
w• IEEE 1149.1 JTAG
• Available packages:
w— 25mm x 25mm, 361-contact
mdimpled ceramic BGA (DBGA)
w o— 35mm x 35mm, 313-contact
taSheet4U.cplastic BGA (PBGA)
The Universe II Advantage
The Tundra Universe II is the industry’s leading high performance
PCI-to-VMEbus interconnect. Universe II is fully compliant with the
VME64 bus standard, and is tailored to support the next-generation of
advanced PCI processors and peripherals. With a zero wait state
implementation for write transactions, and the capability to support
prefetch reads and multi-beat transactions, the Universe II provides
high performance on the PCI bus.
The Universe II eases development of VMEbus systems by providing
direct connection to a local PCI bus. The device is ideally suited for
CPU or peripheral boards functioning as both master and slave in the
VMEbus system. Bridging is accomplished through a decoupled
architecture with independent FIFOs for inbound, outbound, and DMA
traffic. With this architecture, throughput is maximized without
sacrificing bandwidth on either bus.
With the Universe II, you know that as your system becomes more
complex, you have proven silicon that continues to provide everything
you need in a PCI-to-VME bridge.
Figure 1: Universe II Block Diagram
Four location
montiors
Fixed priority,
to support VMEbus Round robin,
broadcast capability Single level modes
Location
Monitor
VMEbus
Arbiter
VMEbus Slave Channel
Posted Writes, Prefetched Reads,
Coupled Reads
DMA Channel
Bidirectional FIFO,
Direct/Linked List Mode
Register Channel
Configuration Registers,
Mailbox Registers, Semaphores
Interrupt Channel
Interrupt Handler,
Interrupter
PCI Target Channel
Posted Writes, Coupled Read
JTAG
IEEE1149.1
Boundary
Scan
8091862_BK001_03
www.Da© 2003, Tundra Semiconductor Corporation. All Rights Reserved.
-1-
Document: 8091142_FB001_01
Tundra Semiconductor Corporation
Tundra Semiconductor Corporation



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