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908E621 Datasheet

Integrated Quad Half-Bridge and Triple High-Side

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Freescale Semiconductor
Technical Data
Integrated Quad Half-bridge and
Triple High Side with Embedded
MCU and LIN for High End
Mirror
The 908E621 is an integrated single package solution that
includes a high performance HC08 microcontroller with a
SMARTMOS analog control IC. The HC08 includes flash memory, a
timer, enhanced serial communications interface (ESCI), a 10 bit
analog-to-digital converter (ADC), internal serial peripheral interface
(SPI), and an internal clock generator module (ICG). The analog
control die provides four half-bridge and three high side outputs with
diagnostic functions, a Hall effect sensor input, analog inputs, voltage
regulator, window watchdog, and local interconnect network (LIN)
physical layer.
The single package solution, together with LIN, provides optimal
application performance adjustments and space saving PCB design.
It is well-suited for the control of automotive high end mirrors.
Features
• High performance M68HC908EY16 core
• 16 KB of on-chip flash memory, 512 B of RAM
• Two 16-bit, two-channel timers
• LIN physical layer interface
• Autonomous MCU watchdog / MCU supervision
• One analog input with switchable current source
• Four low RDS(ON) half-bridge outputs
• Three low RDS(ON) high side outputs
• Wake-up and 2 or 3-pin Hall effect sensor input
• 12 microcontroller I/Os
• Pb-free packaging designated by suffix codes EK
Document Number: MM908E621
Rev. 6.0, 4/2012
908E621
QUAD HALF-BRIDGE AND TRIPLE HIGH SIDE
SWITCH WITH EMBEDDED MCU AND LIN
EK (Pb-Free)
98ASA10712D
54-PIN SOICW-EP
ORDERING INFORMATION
Device
(Add an R2 suffix for
Tape and reel orders)
Temperature
Range (TA)
Package
MM908E621ACPEK
-40 to 85°C 54 SOICW-EP
100 nF
4.7 μF
μC PortA
μC PortB
μC PortC
μC PortD
μC PortE
Internally Connected
Internally Connected
LIN VSP1:8]
VDDA/VREFH
L0
EVDD
VDD
HB1
VSSA/VREFL
EVSS
VSS
908E621
HB2
HB3
RST A
RST
HB4
IRQ A
IRQ
HS1
PTA/KBD0
PTA1/KBD1
HS2
PTA2/KBD2
PTA3/KBD3
HS3
PTA4/KBD4
HVDD
PTB3/AD3
A0
PTB4/AD4
PTB5/AD5
A0CST
PTC2/MCLK
H0
PTC3/OSC2
PTC4/OSC1
TESTMODE
PTD0/TACH0
PTD1/TACH1
PTE1/RXD
EP
GND[1:4]
>22 μF
Wake-up Input
100 nF
M
M 4 x Half-brideOutputs
M
High Side Output 1
High Side Output 2
High Side Output 3
Switched 5.0 V Output
Analog Input with Curet Source
Analog Input Current Source Trim
Two 3-pin Hall Sensor Input
Pull to GND for User Mode
Figure 1. 908E621 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2007-2012. All rights reserved.
Freescale Semiconductor
Freescale Semiconductor



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