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74HC148 Datasheet
8-3 Line Priority Encoder
National Semiconductor
National Semiconductor


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74HC148 pdf
February 1988
MM54HC148 MM74HC148
8-3 Line Priority Encoder
General Description
This priority encoder utilizes advanced silicon-gate CMOS
technology It has the high noise immunity and low power
consumption typical of CMOS circuits as well as the speeds
and output drive similar to LB-TTL
This priority encoder accepts 8 input request lines 0– 7 and
outputs 3 lines A0–A2 The priority encoding ensures that
only the highest order data line is encoded Cascading cir-
cuitry (enable input EI and enable output EO) has been pro-
vided to allow octal expansion without the need for external
circuitry All data inputs and outputs are active at the low
logic level
All inputs are protected from damage due to static dis-
charge by internal diode clamps to VCC and ground
Features
Y Typical propagation delay 13 ns
Y Wide supply voltage range 2V – 6V
Connection Diagram
Dual-In-Line Package
Truth Table
Order Number MM54HC148 or MM74HC148
TL F 9390 – 1
Inputs
Outputs
EI 0 1 2 3 4 5 6 7 A2 A1 A0 GS EO
HXXXXXXXX H H H H H
L HHHHHHHH H H H H L
L XXXXXXXL L L L L H
L XXXXXXLH L L H L H
L XXXXX LHH L H L L H
L XXXX LHHH L H H L H
L XXX LHHHH H L L L H
L XX LHHHHH H L H L H
L X LHHHHHH H H L L H
L LHHHHHHH H H H L H
H e High L e Low X e irrelevant
C1995 National Semiconductor Corporation TL F 9390
RRD-B30M105 Printed in U S A

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