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02013Rxxxx Datasheet

SUrface Mount Ceramic Capacitor

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Surface Mount Ceramic Capacitor
NPO (CG) Dielectric
FEATURES
Ultra Stable TCC of 0±30ppm
Excellent Hi-F Performance
Low Dissipation Factor
Ideal for Timed RC Circuits and
Critical Tuning Applications
APPLICATIONS
Computer Industries
Communication Electronics
Consumer Electronics
Automotive Electronics
QUICK REFERENCE DATA
DESCRIPTION
Rated Voltage UR (DC):
NP0 Dielectric
PARAMETER
10V,16V, 25V, 50 V & 100V
Capacitance Range (E12 series):
NP0 (CG)
1pF to 0.01uF
Tolerance of Capacitance at Tamb=20ºC:
NP0 (CG):
C < 5pF(standard is ±0.25pF
±0.25pF, ±0.1pF & ±0.05pF
5pF C <10pF (standard is ±0.50pF) ±0.50pF, ±0.25pF
C 10pF (standard is ±5%)
±5%, ±2% & ±1%
Test Voltage (DC) for 1 Minute:
2.5 ×UR
Sectional Specifications:
IEC 60384-10,
Second edition 1989-04;
Also based on CECC 32 100
Detailed Specification:
Based on CECC 32 101-801
CROSS-SECTION CONSTRUCTION
The ceramic capacitor consists of a
rectangular block of ceramic dielectric
in which a number of interleaved
NME and BME metal electrodes are
contained. This structure gives rise to
a high capacitance per unit volume.
The inner electrodes are connected to
the two terminations, silver dipped
with a barrier layer of plated nickel
and finally covered with a layer of
plated tin (NiSn). A cross section of
the structure is shown in Figure 1.
Skywell Technology
Skywell Technology



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